§ 01Before the Firmware, Before the Logic — Get Power and Ground Right
Every new board has the same first test: does it power up cleanly? Not "does the LED blink" — that comes later. The question is whether the chip's supply rails are stable, the ground is solid, and the device is actually out of reset. Get these four things wrong and every measurement you take after them is noise. A logic analyser trace that looks corrupted, an oscillator that refuses to start, a microcontroller that programs once and then never again — these are overwhelmingly power and boot-strapping problems, not firmware problems.
Start with power. Most microcontrollers have more than one supply pin, and every one of them needs to be connected. A common mistake on a first layout is populating one VDD pin and assuming the others are optional. They are not. Multiple supply pins exist because the chip has separate power domains for its core logic, its I/O banks, and its analogue section. Leave one floating and that domain is powered through substrate leakage at an indeterminate voltage. The chip may appear to run — badly, intermittently — which is worse than not running at all.
A common mistake on a first layout is populating one VDD pin and assuming the others are optional.
Each supply pin also needs its own bypass capacitor, placed as close to the pin as the layout allows. The value is typically a small ceramic in the 100 nF range in parallel with a larger bulk capacitor somewhere nearby — but check the datasheet for the part you are actually using. The job of these capacitors is not mysterious: switching logic draws current in sharp spikes. Without local storage to supply those spikes, the inductance of even a short PCB trace causes the rail to dip momentarily. At high clock speeds those dips become timing violations. Keep the bypass capacitor's connection to the ground plane short, avoid routing it through a via if you can help it, and never share a bypass capacitor between two supply pins on the assumption that one will do for both.
Ground deserves the same respect people usually reserve for the supply rail. A single-point ground reference shared sloppily across a board can have tens of millivolts of difference between two nominally identical "ground" nodes when significant current flows. If the chip's analogue ground (AGND) and digital ground (DGND) are brought out separately — common on devices with an integrated ADC — connect them together at one point, close to the chip, not at the power supply or at opposite ends of the board. The reason is the same as for bypass caps: keep the noisy return currents of the digital side from disturbing the quiet analogue reference.[1]
§ 02Reset: Held Low, Released Cleanly
The reset pin is where many beginners spend the least thought and lose the most time. On the majority of microcontrollers, reset is active-low: hold the pin low and the chip is in reset; release it and the chip starts. The minimum requirement is a pull-up resistor — typically somewhere in the 10 kΩ region — to the supply rail. Without it, the pin floats, and a floating reset pin on a live board will cause random resets from capacitively coupled noise, ESD, or simply a finger nearby.
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A reset capacitor, placed from the reset pin to ground alongside the pull-up, adds a deliberate power-on delay. As the supply rises, the capacitor holds the pin low for a short period, then it charges through the pull-up and the chip comes out of reset only once the supply is stable. Many modern microcontrollers have internal power-on reset circuits that do this job adequately on their own, but an external RC filter is cheap and eliminates ambiguity. Again, read the device's datasheet — some parts require a minimum reset pulse width, and some actively prohibit a large external capacitor on their reset pin because it interferes with their internal circuitry.
If your board includes a manual reset button, wire it between the reset pin and ground. No resistor in series is needed; the pull-up already limits current. Add a small capacitor — a few tens of nanofarads — across the button to suppress contact bounce. If you are using a programmer or debug probe that can assert reset (SWD and JTAG adapters typically can), make sure your external RC does not load the line so heavily that the probe cannot pull it low; a very large capacitor will slow reset assertion and confuse the probe's timing.[2]
§ 03Boot Mode: Telling the Chip What to Run
Many microcontrollers have one or more boot configuration pins that determine where execution begins at startup. The most common configurations are: run user flash, run an internal ROM bootloader, or (on devices with external memory) run from an external bus. These pins are sampled at the moment reset is released, which means they must be at a valid, stable level before reset deasserts — not a millisecond after.
On STM32 devices, for example, the BOOT0 pin selects between user flash and the factory ROM bootloader. On many Microchip PIC and AVR parts, fuse bits baked into configuration flash serve the same role. On NXP and other families the mechanism varies. Whatever the mechanism, the principle is identical: at the rising edge of reset, the chip reads its boot configuration and commits to a path. A floating boot pin sampled at that moment is sampled at whatever the line capacitance happens to hold — which is undefined.
The fix is always the same: pull every boot configuration pin to a defined level through a resistor, not a hard short. Use a resistor rather than wiring it directly to VDD or GND so that a programmer or test jig can override the level if needed — a direct short cannot be overridden. If you need to be able to toggle the device into its bootloader for field programming, bring the boot pin to a header or a jumper. If you never need to change it in the field, a pull-up or pull-down resistor that establishes the "run user code" state is all that is required.
One subtlety that catches engineers: if the microcontroller's boot pins are shared with peripheral functions — SPI chip-selects, UART lines, or I2C are common culprits — the peripherals on those nets will drive the line at startup before your software configures them otherwise. Design the board so that peripherals connected to boot pins are in a known, non-asserting state at power-on, or choose different pins for those peripherals.[3]
§ 04Four Things, Then Everything Else
Power to every domain. Ground with no ambiguity. Reset with a pull-up and a defined release sequence. Boot pins held at a valid level before reset releases. These four are the foundation: get them right and the chip powers up the same way every time, your debug probe connects reliably, and when something goes wrong you can trust the hardware enough to look at firmware as the cause. Skip them and you are debugging shadows — signals that change depending on what probe you attach, boards that work in one temperature and fail in another, problems that seem electrical but are actually race conditions at power-on. Establish the foundation first. Everything else follows.
Notes
- Every rule here is a starting point. The datasheet for the part in front of you outranks all of it. ↩
- If you can add only one thing to a board you have already laid out, add a debug header. ↩
- A board that behaves differently with a probe attached is telling you something about its grounding, not about the probe. ↩