PA20/40 - Logic Analyzer

PA20 and PA40 Series Logic State Analyzers, in combination with a standard personal computer, provide a full featured, high-performance tool for the troubleshooting and performance verification of digital circuits. A logic analyzer is the digital counterpart of an analog oscilloscope. It allows a number of digital input signals to be sampled and stored sequentially in a high-speed memory or buffer. A logic analyzer can also recognize a condition, or sequence of conditions, on the input data and use that combination of events to trigger data storage. The information acquired is displayed as oscilloscope-like waveforms or as list of numbers representing a sequence of logic states. PA20 and PA40 Series Logic State Analyzers are very compact and communicate with the PC through the parallel port.

With their 128K Samples of acquisition memory per channel, PA20 and PA40 Series Logic State Analyzers are the best choice where large amount of data need to be acquired and analyzed.

PA20 and PA40 Series Logic State Analyzers can work in two different operation modes: Timing mode and State mode. Timing mode is useful when recording the input data at a constant rate determined by a fixed time base. As a result, the waveform display represents time in linear form on the X-axis and logical state on the Y-axis. In State mode, instead, an external sample clock is provided, thus synchronizing sampled data with state transitions that occur in the circuit under test.

PA20 and PA40 Series Logic State Analyzers feature powerful triggering conditions, such as edge trigger, pattern trigger and advanced trigger specification, in order to trigger data storage at the very specific event needed to properly debug the circuit under test.

In addition, storage filters control input data storage. They work both in Timing mode and State mode and can be used to control under which condition sampled data is effectively stored into the acquisition memory. When one or both of the storage filters is enabled, data will be stored by the analyzer only if the signal connected to the enabled filter is logically true. PA20 and PA40 Series Logic State Analyzers provide a feature that helps extend their triggering capabilities and allows you to use them with other instruments: the Trigger Output. The Trigger Output signal (available on the BNC on the frontal panel) is generated when the analyzer's trigger condition is satisfied; thus, it can be used to trigger an external measurement system or other device. For example, you may want to use the Trigger Output signal to trigger an oscilloscope.

PA20 and PA40 Series Logic State Analyzers allows you to group input channels into bus items. The user interface will display the acquired data by grouping the input channels as specified. The order with which the input channels build a bus is used to determine the numeric value of bus at each sampling, which is also displayed by the analyzer.

PA20 and PA40 Series Logic State Analyzers, additionally, feature a series of serial data analysis--sets of algorithms that perform a special analysis on the raw acquired data. By defining an item as one of the three available serial analysis functions (asynchronous serial channel, generic synchronous serial channel, I2C-bus), the user interface will automatically display the appropriate serial character or packet characteristics.

To avoid missing fast events or short pulses, PA20 and PA40 Series Logic State Analyzers feature a glitch capture logic, which is capable to detect signal transitions finer than the sampling rate (down to a minimum time resolution of 50 ns).

All this features are accessible from a user-friendly yet powerful user interface running under Windows 9x/Me/2000/NT. A Waveform window displays the acquired data in a graphical fashion. Input channels are grouped up into customizable items for meaningful representation. Additionally, a Listing window provides an alternate presentation for sampled data. The sampled data is displayed as a list of numerical logic values instead that as a waveform graphical representation. An interface library (DLL) is also provided (as option) so that you can interface your own programs directly with the analyzers.

Logic Analyzer Model	Sampling Rate	Channels	Price
PA2016A	20MSa/s	16	phased out 1/17/2005
PA2032A	20MSa/s	32	phased out 11/3/2004
PA4016A	40MSa/s	16	phased out 9/15/2004
PA4032A	40MSa/s	32	$1,645

Note: All items are F.O.B. Fremont, CA. We reserve the right to change or correct prices without notice. Prices only effective within the U.S.

Availability: Nearly all items are stocked and available for same day delivery. Normally any item not in stock can be delivered in 3-4 days.

Warranty: All hardware products are backed by a 1 year warranty for parts and labor (socket damage not included).

Request a Quote: Go to the Ordering Inquiry Form to request a price quote or to inquiry about placing an order. A Tribal sales representative will contact you as soon as possible.